3 commits

Author	SHA1	Message	Date
saschawillems	3862b4bcc2	Proper barriers for buffer writes and reads between host and device (non-coherent)	2017-09-15 20:43:40 +02:00
saschawillems	66a87bbf21	Flush/invalidate host and device memory writes	2017-09-15 20:41:43 +02:00
saschawillems	1e4944a9e1	Added minimal headless compute example	2017-09-14 22:17:48 +02:00